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8812AU: not RX-functional on first init from true cold (both devourer and vendor driver) — startup-time row blocked #205

Description

@josephnef

While extending the startup-time benchmark (docs/startup-time.md) to true-cold methodology (VBUS power-cycle / machine power-off per rep), the bench's RTL8812AU turned out to be the one chip that cannot be measured: it does not come up RX-functional on its first init from genuine cold — under either driver. Every other supported chip (8814AU, 8821AU, 8822BU, 8821CU, 8812CU, 8812EU) measured cleanly under identical methodology, so the 8812AU row is missing from the table.

Symptoms (reproduced across 2 independent machine power-cycles + several VBUS cycles)

  • devourer: first init from true cold aborts at InitLLTTable8812A failed (4× reproduced). Suspicious detail: hal_init.power_on = 20 ms — near-instant, as if the power-on sequence returns believing the MAC is already up when from cold it isn't. An immediate retry completes hal_init (~2.0 s) but the RX path can stay deaf.
  • vendor 88XXau (reference/ tree built for host 6.18): from the same pristine cold state, probe → monitor-up completes normally (~4.3 s by dmesg) but the monitor hears 0 frames in 30 s while a T2U beside it hears the same (verified-radiating) beacon flood in 2.4 s.
  • Both drivers work after a re-init; warm init worked all day (which is why this was never seen — the benchmark harness's per-rep authorized-toggle never reaches true cold, and the chip retains state across it).

Fault candidates (undecided — needs lab access)

  1. The unit — cold-start marginality (crystal/LDO/PLL not ready on first init); it also went flaky on warm reps late in the session.
  2. Its USB port — the dongle sits on an xhci root port (no hub re-driver). Side finding: uhubctl VBUS cycling on that root port progressively wedged the device to the point that only a full machine power-off recovered it, while the smart-hub ports took 30+ cycles across 6 other DUTs without issue. Never VBUS-cycle root ports on this rig.
  3. A shared cold-init gap both drivers trip over on this silicon/unit — devourer's 20 ms power_on from cold is worth comparing against the vendor CardEnable/pwr_seq polling either way.

Discriminator (first thing to do with lab access)

Move the dongle to a free port on one of the switchable smart hubs. That simultaneously: (a) tests port-vs-unit in minutes, (b) provides per-rep VBUS cold for iterating on any devourer-side fix, (c) unblocks the missing docs/startup-time.md row.

Full session notes (timings, dmesg, flood cross-checks) are recorded in the project memory under 8812au-cold-start-BOTH-drivers-fail-unit-or-port-suspect-plus-root-port-vbus-hazard-2026-07-06.

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